leakage power

However, few researches in the literature have focused on reducing the leakage power in PIL 1.

然而, 在以往的研究工作中,对流水化指令缓冲存储器的泄漏功耗问题关注较少.

Besides, the non-volatile memory has advantages such as low leakage power and high density.

另外，新型非易失性存储器由于其静态能耗低、密度大等特点，被考虑作为低功耗存储系统的实现。

Despite its cure for leakage power, adding hafnium creates headaches for the process integration engineer.

添加铪基本解决了泄漏功耗问题, 不过铪也让工艺集成工程师头疼不已.

An effective way to reduce the leakage power is by means of multithreshold CMOS technique, which can restrain the leakage current by adding a MOS transistor to low threshold circuit.

多阈值CMOS技术是一种降低电路漏电流功耗的有效方法.它通过接入高阈值MOS管来抑制低阈值模块的漏电流。

In low-power mode, as the expense of speed, leakage power is reduced by 68%~ 73% vs. high-speed mode.

在省电模式下，通过牺牲电路的速度来实现降低功耗的目的，泄漏功耗与高速工作模式相比可以减小约68%～73%。

VSF: A Leakage Power Evaluation Model for CMOS Combinational Circuits

VSF：CMOS组合电路的静态功耗评估模型