address bit的例句大全

Analyzing principle of fault detection in main memory based on characteristic matrix, the paper introduces the condition and methods of detecting address bit and data bit.

在分析基于特征矩阵的主存故障检测方法原理的基础上，介绍了检测地址位及数据位故障时特征矩阵存在的条件及其确定方法。

The design makes use of grey code as its address code and generates flag bit by dummy-address-page.

采用格雷码作为地址编码，引入虚拟地址页来产生标志位。

In the time that system from restore state into protected environment of 32-bit have seen divided page mechanism and running multi-tasks, This paper puts forward an idea about the address space problem of system beginning.

探讨了计算机系统初始化（即系统从复位状态进入到32位的具有分页机制及运行多任务环境）时所要考虑的地址空间安排问题，提出了自己的设想。

Of the disadvantages, a32-bit program must be cognizant of the segmented architecture to take full advantage of the32-bit address space.

缺点是，32位的程序必须认识这种分段体系结构，才能充分利用32位地址空间。

The route finding function adopts Trie-based Routing Table offered by Intel ￡? and realizes Longest prefix Length match algorithm of 32-bit IP address.

路由查找功能采用Intel提供的TRIE表结构，实现32位IP地址最长前缀匹配算法。

On32-bit systems, the default address-space model is that it uses a single segment for user and stack data with a maximum aggregate size close to256 MB.

在32位系统上，默认的地址空间模型是对于用户和堆栈数据使用单一数据段，最大总大小接近256MB。

Implementation of a High-Speed 32-Bit Adder for Address Generation

一种用于高速地址产生的32位加法器电路的实现

The AO line is usually tied to the least significant bit of the address bus.

AO线通常被连结到地址总线的最低有效位。

The interface adopts 16-bit-wide data bus, 10-bit-wide address bus and provides information by non-DMA mode.

该接口采用16位数据线，10位地址线，并以非DMA方式提供信息。

This kind of interface provides 8-bit bidirectional communication, has data/ address bus, control bus and status bus, and responds to the requirement of interruption. It almost has the features of microcomputer bus and makes the design feasible theoretically.

并行接口在EPP模式下能实现8位数据的双向传输，具有数据/地址线、控制线和状态线，能响应中断请求，已初步具有总线的接口特性，为开发平台的实现提供了基础。

The parallel print ports of IBM-PC can be extended to three bi-directional 8-bit I/ O ports by a programmable integrated circuit chip named 8255. The three I/ O ports can be used as data bus, address bus and control bus of the data-acquisition instrument.

通过可编程并行接口芯片8255将IBM Pc并行打印端口扩展成3个具有双向通讯功能的8位I/O端口，利用这3个I/O端口分别作为数据采集仪器的数据总线、地址总线和控制总线。

Every network interface connected directly to the Internet (or to any IP-based network) is identified by a unique 32 bit IP address.

每个直接连接到Internet（或任何基于IP的网络）的网络接口都用唯一的32位的IP地址来识别。

The Internet Protocol defines an IP address as a32-bit number.

互联网协议将IP地址定义为一个32位的编号。

A quadword is identified by the address of the word containing the low-order bit ( bit0).

四倍字长地址由含最低位（0位）字的地址来标识。

the physical address is generated by multiplying the segment register by 16, then adding a 16-bit offset.

物理地址由段寄存器中的段值乘以16再加上16位的偏移生成的。

figure 6 shows the 32-bit memory address space for a db2 agent process.

图6展示了用于一个DB2代理进程的32位内存地址空间。

figure 9 - db2 32-bit memory address space on sun solaris 32-bit

图9-32位SunSolarisDB2中的32位内存地址空间

the node address specified through this device's advanced properties does not have the locally administered bit (2nd bit on the wire) set.

通过设备的高级属性指定的节点地址没有本地管理的字节（线上的第2个字节）集。

Recent PIC's will supply directly a 16-bit branching-address.

最新的PIC可直接提供16位转移地址.

A 32 bit address bus can locate 4 Gigas ( 2 ^ 32 ) of different memory locations.

32位地址总线可以确定4G ( 2的32次幂 ) 个不同的存储位置.