hardware language的例句大全

Finally, Verilog HDL hardware language program was written in the FPGA to realize the function of the circuit module and simulated and validated the interpolation algorithm.

最后通过对FPGA编写Verilog hdl硬件语言程序，实现各电路模块的功能以及对插补算法的仿真验证以及实现。

This design emphasis point is realizes the FIR digital filter function with hardware language VHDL.

本设计用硬件语言VHDL来实现FIR数字滤波器功能.

Finally, based on the simulations, the dissertation designs the demodulation system with hardware language. For the need of low resource consumption and the easiness of implement, the methods of modules implement are compared and optimized.

最后，在仿真的基础上，利用硬件语言编写解调系统，对各个功能模块的实现方法进行比较和优化，使该解调系统在满足功能的基础上易于实现、资源消耗少。

Design for the system that is on the plat of Quartus II 5.0 which use the hardware language VHDL, design PXI modulo considered the Compact PCI electricity code.

系统设计是在QUARTUS II5.0的平台上用VHDL硬件描述语言完成的，设计PXI模块时充分考虑了Compact PCI规范的电气规定。

Then data gained by simulation through the hardware language VHDL were listed out, which proved the validity of the conversion on hardware system.

并列出了一组由VHDL硬件语言模拟得到的转化结果的数据，来证实能在硬件上转化的正确性；

The paper studies the hardware of the interface circuit and how to control the sweep fingerprint sensor to complete the task of high quality fingerprint gathering with hardware language VHDL.

重点研究接口电路的硬件组成和如何采用硬件语言VHDL编程控制滑动式指纹传感器以完成高质量的指纹采集工作。

The design technology and tool has seen a tremendous change with the springing of lare scale programme tool-CPLD/ FPGA and broad application of hardware language.

大规模可编程逻辑器件CPLD/FPGA的出现和硬件描述语言的广泛应用使得电子系统的设计技术和工具发生了深刻的变化。

The aim of this paper is to implement the decoder of turbo codes with FPGA. The iterative decoding algorithms and how to implement them with hardware language have been discussed in the paper.

本文以Turbo码译码器的FPGA实现为目标，对Turbo码的迭代译码算法及用硬件语言实现其译码算法进行了深入研究。

On this hardware, SPOTs run a small-footprint JVM called Squawk, which is written almost entirely in the Java language.

在这样的硬件上，SPOT运行一个名为Squawk的小型JVM，这个JVM几乎完全是用Java语言编写的。

This paper introduces the hardware 、 software platform of Soft PLC and the system design of the software. Moreover, ex-pounds the key technology such as how to the edit and compile function of ladder language. At last, introduces the test of Soft PLC.

介绍了软PLC的硬件平台、软件平台和软件的整体架构设计，同时阐述了其中的关键技术如梯形图语言的编辑功能和编译功能实现，最后介绍了软PLC系统在测试中的运行情况。

Reform and discussion on the computer hardware curriculum taking Assembler Language Design as master line in modern teaching

以《汇编语言程序设计》为主线的计算机硬件课程在现代教学中的改革与探讨

The paper introduce the technique of EDA, on it, logical function has been stigmatized by VHDL language, the design of hardware become more flexible.

本文引入了电子设计自动化（EDA）技术，在EDA平台上使用硬件描述语言（VHDL）完成对硬件功能描述，使硬件设计更加灵活。

Construction of "Language to Describe" the Teaching of Computer Hardware Platform

构建类描述语言的计算机硬件教学平台

Boogie is used to verify the assembly language against a specification and guarantees safe interaction with the TAL code and hardware.

它还使用Boogie根据规范来验证汇编语言，并确保它可以与TAL代码和硬件安全地交互。

This article introduces realization method of hardware and software to temperature relay automatic test system by computer and VB programming language.

本文介绍了利用计算机和VB语言进行的温度继电器自动测试系统的硬件结构和软件程序的实现方法。

The Hardware Description Language and the Design of a Logic System

硬件描述语言（HDL）与逻辑系统设计

This design realizes with verilog hardware describing language, so it has a good flexibility and portability.

本设计采用Verilog硬件描述语言实现, 具有良好的可移植性和设计灵活性.

The cymometer design has important theoretical significance and practical application value, which adopts VHDL language programming, with the FPGA for hardware design carrier and the integrated development tool based on the SOPC.

采用VHDL语言编程、以FPGA为硬件设计载体、基于SOPC集成开发工具的频率计的设计，具有重要的理论意义和实际应用价值。

In this paper, EPP protocol was introduced and the logic of FIFO read/ write operations and data read cycle of EPP protocol were realized with VHDL language. Meanwhile, hardware structure graph of data collecting card and the flow chart of display programme were given.

文章介绍了并口EPP协议，用VHDL语言实现了FIFO读写操作逻辑和EPP协议的数据读周期，给出了数据采集卡的硬件结构图及显示程序流程图。

An Analog Hardware Description Language ( AHDL) model of the membrane was developed to enable the simulations of the complete microsystem.

一个模拟硬件描述语言（AHDL）模型膜发展使模拟系统完整化。