video decoder的例句大全

A study on the input buffer and system control unit in HDTV video decoder

HDTV视频解码器输入缓存及系统控制单元的研究

Hardware Implement of Interpolation and Weighted Prediction in Video Decoder

视频解码器中插值与加权预测的硬件实现

Study and implementation of video decoder algorithm based on LAN

基于局域网的视频解码算法的研究与实现

The Hardware Implementation of Multi-channel Parallel Output in Video Decoder

视频解码器中多路并行输出的硬件实现

An optimized hardware architecture of run lentil decoding, inverse scan, inverse quantization and inverse transform in AVS video decoder is presented.

提出了一种适用于AVS的游程解码、反扫描、反量化和反变换硬件结构优化设计方案。

Optimization of MPEG-4 video decoder based on ARM7

基于ARM7的MPEG-4视频解码器的优化

In the embedded operating system platform, Analog camera signals were digitalized by a video decoder, and converted into suitable size for viewing by the processor. Then the video was compressed into MPEG-4 format. Data stream was sent out through the CDMA wireless module.

在嵌入式操作系统平台下，摄像头模拟信号通过视频解码器进行数字化，经处理器转换为适合观看的格式，之后图像经压缩成MPEG-4格式，数据流通过CDMA无线模块发送。

Realization and Optimization of MPEG-4 Video Decoder based on SOC

面向嵌入式系统的MPEG-4解码加速器的设计和优化

Error Localization Technique for Improving MPEG-4 Video Decoder

一种提高MPEG-4解码器性能的错误定位技术

note compression is transmitted through the network or telecommunication link to go, and in the video decoder to decode.

压缩的注被通过网络或是电信联接传输走，并在视频解码端进行解码。解码过的帧就可以被显示了，H。

VLSI design and implementation of loop filter for AVS high-definition video decoder paper.

设计并实现了一种适用于AVS高清解码器的环路滤波器.

China's independent development of the audio-video standard of AVS Video decoder reference program.

中国自主开发的音视频标准AVS中的视频编解码参考程序.

Designed and implemented an ARM-based embedded AVS video player. Provide a feasible solution of "completing the video decoder by cooperation of the hardware and the software".

本文的主要贡献有：1.设计并实现了一种基于ARM的嵌入式AVS视频播放器，为软硬件协同完成AVS视频解码的设计思路提供了一个可行的解决方案。

The Implementation of Development Platform for Digital HDTV Video Decoder ASIC

数字高清晰度电视视频解码芯片开发平台的研制

Brand new more stable video decoder.

全新的更加稳定的视频解码器.

A novel decentralized control scheme of dedicated MPEG 2 video decoder is presented.

本文提出了一种新的适用于MPEG2专用视频解码芯片的控制策略:分散控制.

Various common FPGA-based prototyping verification platforms have been launched by domestic company or foreign corporation, but they are expensive and structural superfluous, so the paper presents a kind of FPGA-based prototyping verification platform for video decoder chip design.

针对国内外厂商推出的各类通用原型验证平台价格昂贵，结构冗余的问题，本文提出了一种适用于AVS视频解码芯片设计的原型验证平台。

Then we accomplish hardware design and simulation for prediction module of video decoder by ASIC design way.

最后本文依照ASIC芯片设计方法对视频解码芯片预测模块进行硬件设计和仿真。

The interpolation of AVS adapts sub-pixel to improve the definition of video decoder, and also is the computing and memory access bottleneck of video decoder.

在AVS标准中的插值算法采用分像素提高视频解码的清晰度，也是解码端主要的访存和计算瓶颈。

at the receiver end, to decode and display one frame in the sub-gop, the video decoder only needs packets belonging to this frame.

在接收端，视频解码器仅需要Sub-GOP中的某一帧的分组就可以解码并显示该帧。