memory bandwidth

Limited by memory bandwidth, high bandwidth routers often use input queued crossbar switch fabric.

由于受到存储器带宽的限制，目前宽带路由器一般采用输入缓冲的crossbar交换开关。

Memory bandwidth is very small.

要求内存带宽较小.

In this paper the relationship between memory contention and the number of module in a parallel or interleaved memory generally used in a multiprocessor system is analysed and mathematical models of efficient memory bandwidth for 2n module and prime module are set up respectively.

本文对多处理机中通常使用的并行或交叉存储器，进行了模的个数对存储冲突的影响的分析，并建立了在模块数分别为2~n和素数时存储有效宽度的数学模型。

The numerical experiment results show that the speed is increased by more than 10~ 2 times. In addition, we optimize the storage of texture in the algorithm, which saves video memory bandwidth, and is more suitable for reconstruction of multi-scan mode.

同时算法中优化了纹理存储方式，节约了显存带宽，更适合多次偏置扫描模式的重建，算法运行速度比CPU上的运行速度快了两个数量级。

Memory bandwidth is one of the main bottlenecks in low-end systems for ATM UNI.

内存带宽是低端系统用于ATM UNI时的主要瓶颈之一。

Then, we design and implement a Shared by Heterogeneity Processor L2 Cache sub-system to exploit the extra parallelism and locality in stream application, and improve the off-chip memory bandwidth. These lead to a more completed parallel hierarchy stream memory system.

针对流应用中各种可用的并行性和局域性，我们设计并实现了由异构处理器共享的二级缓存子系统，并对片外存储层次进行改进，完善了原有的存储层次结构。