lock loop的例句大全

article concludes with a phase-locked loop phase noise improvement approach.

文中最后提出了改善锁相环相位噪声的办法.

we adopted phase-locked loop in order to assure synchronous sampling and accuracy of fft.

系统采用了硬件锁相环技术,来跟踪电网频率的变化,保证采样的同步和傅立叶变换的准确度.

the paper studies digital control scheme of resonance inverter frequency-tracking based on all digital phase-locked loop.

本文主要研究了基于全数字锁相环的谐振型逆变器频率跟踪的数字化控制方案.

This would cause the thread to access the lock once instead of loop count times.

这样，线程只访问一次锁，而不必每次进入循环时都进行访问了。

The text relates the fundamental principles, structures and designs of phase-locked velocity servo loop for threephase asynchronous motor, and introduces the result of tests.

论述了三相异步电动机锁相式速度控制系统的基本原理、结构及其回路设计。并介绍了研制试验的结果。

Application of CSL Structure in Intergrated Phase-Locked Loop

CSL结构在集成锁相环中的应用

An Thyristor Medium-frequency Power Supply Startup Circuit Based on Phase-locked Loop

基于锁相环技术的晶闸管中频电源启动电路

Time difference counting method and phase-locked loop technology are adopted. A systematic phase-detection function module is designed. High-precision measurement of the phase difference is achieved. 4.

采用时间差计数法和锁相环技术，设计了系统的鉴相功能模块，实现了相位差的高精度测量。

The phase-locked loop band-pass filter and the logarithmic amplifier is adopted in the circuit to insure the reliability of receiving signal.

电路中采用锁相带通滤波器和对数放大器，保证有效信号的可靠接收。

Finally, the impedance characteristic of piezoelectricity transducer and the principle of frequency tracking were studied. Software phase-locked loop was used to track self-adapting frequency, and arithmetic of frequency tracking based on change step and dichotomy was presented.

最后，对压电换能器的电抗特性和频率跟踪原理进行研究，采用软件锁相环进行了频率自适应跟踪设计，提出变步进与二分法相结合的频率跟踪算法。

the delay-locked loop is applied to the development of wcdma bts and wcdma mt.

该锁定环在WCDMA基站系统和移动终端的开发中得到应用。

aiming at the 155mb/ s up-stream velocity of atm-pon system, we design the circuit of the burst-mode optical transmitter. we make the frequency synthesis of the pll ( phase-locked loop) get 155mb/ s clock source.

对于PON系统，针对上行传输速率为155Mb/s时，对突发模式光发射机作了电路设计，在电路设计中采用锁相环频率合成器产生155MHz时钟源系统。

The new method simplifies the detection circuit as well as improves response speed of the detection algorithm for it does not require phase-locked loop circuit.

该方法不需要锁相环电路，简化了检测电路结构，且提高了检测算法的响应速度。

5Gb/ s CMOS Monolithic Clock Recovery Circuit Rased on Half-rate Phase-locked Loop

基于半速率锁相环的5Gb/s CMOS单片时钟恢复电路

Validation through prototype testing, test results showed that the three-phase locked loop has achieved the synchronization requirements of the PV inverter system and gained a unit power factor for the inverter. Finally, this article used Verilog language to complete the design of FPGA-based three phase-locked loop.

通过样机试验验证，试验结果表明，本文所设计的三相锁相环达到了光伏逆变系统的同步性能要求，实现了逆变器的单位功率因数运行。

With an unique design of transmission lock out loop, the calling collision of multi users is overcome.

由于设计了一种独特的发射互锁环，有效地解决了多个楼层同时呼梯的冲突问题。

Application of Integrated Circuit Phase-locked Loop in Measuring Pulse Duty Factor

IC锁相环在脉冲占空比测量中的应用